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41 #define SR_C (1<<SR_C_BIT)
42 #define SR_V (1<<SR_V_BIT)
43 #define SR_Z (1<<SR_Z_BIT)
44 #define SR_N (1<<SR_N_BIT)
45 #define SR_X (1<<SR_X_BIT)
46 #define SR_S (1<<SR_S_BIT)
47 #define SR_T (1<<SR_T_BIT)
56 #define IS_CS(sr) ((sr)&SR_C)
57 #define IS_CC(sr) (!IS_CS(sr))
59 #define IS_EQ(sr) ((sr)&SR_Z)
60 #define IS_NE(sr) (!IS_EQ(sr))
62 #define IS_VS(sr) ((sr)&SR_V)
63 #define IS_VC(sr) (!IS_VS(sr))
65 #define IS_MI(sr) ((sr)&SR_N)
66 #define IS_PL(sr) (!IS_MI(sr))
68 #define IS_LS(sr) ((sr)&(SR_C|SR_Z))
69 #define IS_LT(sr) (((sr)^((sr)>>2))&SR_V)
70 #define IS_LE(sr) (IS_LT(sr)|IS_EQ(sr))
72 #define IS_GE(sr) (!IS_LT(sr))
73 #define IS_GT(sr) (!IS_LE(sr))
74 #define IS_HI(sr) (!IS_LS(sr))
87 #define MOVESR(SR,SRC) (SR) = \
88 ( ((SR)&~(SR_Z|SR_N|SR_V|SR_C)) | \
89 (((SRC)==0)<<SR_Z_BIT ) | (( (SRC)<0)<<SR_N_BIT ) )
92 #define GET_CCR(SR) ((u8)(SR))
95 #define SET_CCR(SR,CCR) (SR) = (((SR)&0xFF00) | (CCR))
98 #define GET_IPL(n) (((n)>>SR_IPL)&7)
101 #define SET_IPL(sr,n) (sr) = (((sr)&(7<<SR_IPL_BIT)) | ((n)<<SR_IPL_BIT)))